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Intel AES New Instructions Set - White Paper (May 2010)

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Intel® AES New Instructions are a set of instructions available
beginning with the 2010 Intel® CoreTM processor family based on the
32nm Intel® microarchitecture codename Westmere. These instructions
enable fast and secure data encryption and decryption, using the
Advanced Encryption Standard (AES) which is defined by FIPS
Publication number 197. Since AES is currently the dominant block
cipher, and it is used in various protocols, the new instructions are
valuable for a wide range of applications.
The architecture consists of six instructions that offer full hardware
support for AES. Four instructions support the AES encryption and
decryption, and other two instructions support the AES key expansion.
The AES instructions have the flexibility to support all usages of AES,
including all standard key lengths, standard modes of operation, and
even some nonstandard or future variants. They offer a significant
increase in performance compared to the current pure-software
implementations.
Beyond improving performance, the AES instructions provide important
security benefits. By running in data-independent time and not using
tables, they help in eliminating the major timing and cache-based
attacks that threaten table-based software implementations of AES. In
addition, they make AES simple to implement, with reduced code size,
which helps reducing the risk of inadvertent introduction of security
flaws, such as difficult-to-detect side channel leaks.
This paper gives an overview of the AES algorithm and the Intel AES
New Instructions. It provides guidelines and demonstrations for using
these instructions to write secure and high performance AES
implementations. This version of the paper also provides a high
performance library for implementing AES in the ECB/CBC/CTR modes,
and discloses for the first time, the measured performance numbers.

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