Optimizing subroutines in assembly language

[Nytro]

Optimizing subroutines in assembly language

An optimization guide for x86 platforms

Contents
1 Introduction ....................................................................................................................... 4
1.1 Reasons for using assembly code .............................................................................. 5
1.2 Reasons for not using assembly code ........................................................................ 5
1.3 Microprocessors covered by this manual .................................................................... 6
1.4 Operating systems covered by this manual................................................................. 7
2 Before you start................................................................................................................. 7
2.1 Things to decide before you start programming .......................................................... 7
2.2 Make a test strategy.................................................................................................... 9
2.3 Common coding pitfalls............................................................................................... 9
3 The basics of assembly coding........................................................................................ 12
3.1 Assemblers available................................................................................................ 12
3.2 Register set and basic instructions............................................................................ 14
3.3 Addressing modes .................................................................................................... 18
3.4 Instruction code format ............................................................................................. 24
3.5 Instruction prefixes.................................................................................................... 25
4 ABI standards.................................................................................................................. 27
4.1 Register usage.......................................................................................................... 27
4.2 Data storage ............................................................................................................. 28
4.3 Function calling conventions ..................................................................................... 28
4.4 Name mangling and name decoration ...................................................................... 30
4.5 Function examples.................................................................................................... 30
5 Using intrinsic functions in C++ ....................................................................................... 33
5.1 Using intrinsic functions for system code .................................................................. 34
5.2 Using intrinsic functions for instructions not available in standard C++ ..................... 35
5.3 Using intrinsic functions for vector operations ........................................................... 35
5.4 Availability of intrinsic functions................................................................................. 35
6 Using inline assembly in C++ .......................................................................................... 35
6.1 MASM style inline assembly ..................................................................................... 36
6.2 Gnu style inline assembly ......................................................................................... 41
7 Using an assembler......................................................................................................... 44
7.1 Static link libraries..................................................................................................... 45
7.2 Dynamic link libraries................................................................................................ 46
7.3 Libraries in source code form.................................................................................... 47
7.4 Making classes in assembly...................................................................................... 48
7.5 Thread-safe functions ............................................................................................... 49
7.6 Makefiles ..................................................................................................................50
8 Making function libraries compatible with multiple compilers and platforms..................... 51
8.1 Supporting multiple name mangling schemes........................................................... 51
8.2 Supporting multiple calling conventions in 32 bit mode ............................................. 53
8.3 Supporting multiple calling conventions in 64 bit mode ............................................. 55
8.4 Supporting different object file formats...................................................................... 57
8.5 Supporting other high level languages ...................................................................... 58
9 Optimizing for speed ....................................................................................................... 59
9.1 Identify the most critical parts of your code ............................................................... 59
9.2 Out of order execution .............................................................................................. 59
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9.3 Instruction fetch, decoding and retirement ................................................................ 62
9.4 Instruction latency and throughput ............................................................................ 63
9.5 Break dependency chains......................................................................................... 64
9.6 Jumps and calls ........................................................................................................ 65
10 Optimizing for size......................................................................................................... 72
10.1 Choosing shorter instructions.................................................................................. 72
10.2 Using shorter constants and addresses .................................................................. 73
10.3 Reusing constants .................................................................................................. 75
10.4 Constants in 64-bit mode ........................................................................................ 75
10.5 Addresses and pointers in 64-bit mode................................................................... 75
10.6 Making instructions longer for the sake of alignment............................................... 77
11 Optimizing memory access............................................................................................ 80
11.1 How caching works................................................................................................. 80
11.2 Trace cache............................................................................................................ 81
11.3 Alignment of data.................................................................................................... 82
11.4 Alignment of code ................................................................................................... 84
11.5 Organizing data for improved caching..................................................................... 86
11.6 Organizing code for improved caching.................................................................... 86
11.7 Cache control instructions....................................................................................... 87
12 Loops ............................................................................................................................ 87
12.1 Minimize loop overhead .......................................................................................... 87
12.2 Induction variables.................................................................................................. 90
12.3 Move loop-invariant code........................................................................................ 91
12.4 Find the bottlenecks................................................................................................ 91
12.5 Instruction fetch, decoding and retirement in a loop ................................................ 92
12.6 Distribute µops evenly between execution units...................................................... 92
12.7 An example of analysis for bottlenecks on PM........................................................ 93
12.8 Same example on Core2 ........................................................................................ 96
12.9 Loop unrolling ......................................................................................................... 98
12.10 Optimize caching ................................................................................................ 100
12.11 Parallelization ..................................................................................................... 101
12.12 Analyzing dependences...................................................................................... 102
12.13 Loops on processors without out-of-order execution........................................... 105
12.14 Macro loops ........................................................................................................ 107
13 Vector programming.................................................................................................... 109
13.1 Conditional moves in SIMD registers .................................................................... 110
13.2 Using vector instructions with other types of data than they are intended for ........ 113
13.3 Shuffling data........................................................................................................ 115
13.4 Generating constants............................................................................................ 118
13.5 Accessing unaligned data ..................................................................................... 121
13.6 Using AVX instruction set and YMM registers ....................................................... 125
13.7 Vector operations in general purpose registers ..................................................... 130
14 Multithreading.............................................................................................................. 131
14.1 Hyperthreading ..................................................................................................... 132
15 CPU dispatching.......................................................................................................... 132
15.1 Checking for operating system support for XMM and YMM registers .................... 134
16 Problematic Instructions .............................................................................................. 135
16.1 LEA instruction (all processors)............................................................................. 135
16.2 INC and DEC (all Intel processors) ....................................................................... 136
16.3 XCHG (all processors) .......................................................................................... 136
16.4 Shifts and rotates (P4) .......................................................................................... 136
16.5 Rotates through carry (all processors) .................................................................. 137
16.6 Bit test (all processors) ......................................................................................... 137
16.7 LAHF and SAHF (all processors) .......................................................................... 137
16.8 Integer multiplication (all processors).................................................................... 137
16.9 Division (all processors)........................................................................................ 137
16.10 String instructions (all processors) ...................................................................... 142
16.11 WAIT instruction (all processors) ........................................................................ 143
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16.12 FCOM + FSTSW AX (all processors).................................................................. 144
16.13 FPREM (all processors) ...................................................................................... 145
16.14 FRNDINT (all processors)................................................................................... 145
16.15 FSCALE and exponential function (all processors) ............................................. 145
16.16 FPTAN (all processors)....................................................................................... 147
16.17 FSQRT (SSE processors)................................................................................... 147
16.18 FLDCW (Most Intel processors) .......................................................................... 147
17 Special topics .............................................................................................................. 148
17.1 XMM versus floating point registers (Processors with SSE).................................. 148
17.2 MMX versus XMM registers (Processors with SSE2)............................................ 149
17.3 XMM versus YMM registers (Processors with AVX).............................................. 149
17.4 Freeing floating point registers (all processors)..................................................... 150
17.5 Transitions between floating point and MMX instructions (Processors with MMX). 150
17.6 Converting from floating point to integer (All processors) ...................................... 150
17.7 Using integer instructions for floating point operations .......................................... 152
17.8 Using floating point instructions for integer operations .......................................... 154
17.9 Moving blocks of data (All processors).................................................................. 155
17.10 Self-modifying code (All processors) ................................................................... 156
18 Measuring performance............................................................................................... 156
18.1 Testing speed ....................................................................................................... 156
18.2 The pitfalls of unit-testing ...................................................................................... 158
19 Literature..................................................................................................................... 158
20 Copyright notice .......................................................................................................... 159

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